High speed printer with variable cycle control



1966 E. M. BLOOM, JR, ETAL 9 9 HIGH SPEED PRINTER WITH VARIABLE CYCLE CONTROL Filed Dec. 2, 1964 4 Sheets-Sheet l cowsmm 16 SPEED DRIVE PAPER FROM 61 WE CARRIAGE CONTROL :i g PULSE PS5 COMPARE COMPARE A8 jPss RING U CONTROL COUNTER COUNTER CIRCUIT F SCAN L55 PS- COUNTER 82 L" L RR 50 -s J 81 R L ERROR @Rm {'58 101 [NH 5i OR L PRINT CYCLE CONTRL 119 5 L 94 i 52 Q ERR/0R HAMMER FIRE 65L gg- COMPARE iNH L EQUAL CHECK I100 1DATA INH DATA 25 5 E EIEE 1. ii STORAGE MATRIX A s I L- T0TAU 54 59 CARRIAGE CONTROL PAPER ii Tsw x RR 1 I5 36 26\ -37- RAfiMER l REXAD W ITE READ WRiTE SELECT ,40

' Y Y MATRIX I l l T J M0 HAMMER 3 ACTUATORQ 55 W T RI RR RISG I 11006 1 086 P 52 5% INVENTORS EARL M. BLOOM,JR. GENADIJ KRYSIUK A TTORNE Y 4 Sheets-Sheet 2 om 0 22m mmizoo E. M. BLOOM, JR, ETAL HIGH SPEED PRINTER WITH VARIABLE CYCLE CONTROL Filed Dec.

Dec. 6, 1966 IE. M. BLOOM, JR, ETAL 4 Sheets-$heet 5 Filed Dec.

-s PRINT LINE COMPLETE CHECK FIG. 3

COMPARE EQUAL COMPLETE )NHIBIT E m L T m P 1 R 0 Ti 7 EL 2 TI I R W 7 D 7 A f E R \l l w! 6 D 3 A /E R E 6 D 2 H C I R w b n0 W TIZN s 2 .1 5S 4486 2 N M 56 1 m S An CF. NNNN N c N C AAAA A 2 T S OCCCC C W [L N B SSSSS 5 W n U N |:LL W 8 mm W TH C WM R0 Dlnlv HIGH SPEED PRINTER WITH VARIABLE CYCLE CONTROL Dem 166 E. M. BLOOM, JR. ETAL 4 $heets-$heet 4 Filed Dec.

3 M mum NNNN DD AAAA U 0000 5 8585 1 a 4 J 7 H M O k m L R v & m G I U |ll| R O Q u C N P A C S H S E R W .I a R M E G SSFIU. T P WW W 0 20 2 R R WW United States Patent 3,289,576 HIGH SPEED PRINTER WITH VARIABLE CYCLE CONTROL Earl M. Bloom, Jr., Endicott, and Genadij Krysiuk,

Vestal, N.Y., assignors to International Business Machines Corporation, Armonk, N.Y., a corporation of New York Filed Dec. 2, 1964, Ser. No. 415,237 13 Claims. (Cl. 101-93) This invention relates to printing and more particularly to a high speed printer apparatus.

While not necessarily limited thereto, the present invention has particular utility to a chain printer apparatus of the type shown in US. Patents 2,918,865 of R. E. Wooding, issued December 29, 1959; 2,993,437 of F. M. Demer et 211., issued July 25, 1961; and 3,066,601 of H. E. Eden, issued December 4, 1962.

In general, the chain printer apparatus as described in the above patents comprises a print mechanism and controls designed to print data a line at a time on a record medium. The print mechanism comprises a constantly moving type chain, a plurality of hammers arranged in a row parallel to a straight portion of the path of travel of the type and means for guiding and feeding a record medium between the hammer array and type chain. The type chain comprises plural type elements attached to a flexible belt or the like. Each type element bears one or more type characters and the elements are arranged on the belt so that one or more character sequences in a continuous loop is formed. Where plural sets are used, the sets are usually identical in number and arrangement of characters. The print hammers are arranged in a linear array so that one hammer is located at each print position in a line. For example, in commercial embodiments of the chain printer, there are 100 and 132 print hammers spaced uniformly at .100 inch. In one embodiment, the characters on the chain have a spacing which is 1.5 times the spacing of the hammers. In such arrangement, within the span of the hammer array, every other character on the chain registers with every third print hammer. Since the type chain is moving constantly, the characters coming into alignment with various hammers are constantly changing. The process whereby the characters move into alignment is referred to as scanning. The process whereby only a portion of the characters on the chain within the span of the hammer array move into alignment, where the characters in alignment are separated by characters not moving into alignment in the same interval is referred to as the subscan (also called subcycle) process. For purposes of definition, the interval of time for all hammers to be scanned by one type character of the moving chain is a print scan which with the 1.5 spacing ratio mentioned above is equivalent to three subscans.

Printing occurs by selective operation of various hammers in the array in timed relation with the arrival of desired characters at predetermined print positions. The printer control for accomplishing this preferably comprises a magnetic core storage device, means for identifying the characters in the sequence in which they appear on the type chain, means for selecting hammers as the characters register therewith, means for timing the various control and print functions, and means for initiating and terminating the printer operation, paper feeding and data storage transfers. The core storage device which may be part of the data processing system or may be separate buffer storage for receiving data from the central processor, stores one line of data at a time. Within the core storage device, an individual core storage position is provided for each hammer position and there will be as many storage positions as there are hammers. When a line of ice data is stored in the storage device, an instruction is received to print. Data is then read from the storage one character at a time by an address read-out means. In the preferred form, the read-out means scans the core storage positions in the same sequence in which the characters are alignable with the hammer positions. Thus, for the 1.5 type character pitch previously mentioned, every third position of storage is scanned during a subscan operation and intermediate storage positions are scanned in the same manner in subsequent print subscans. During the course of a print scan every position of data storage is scanned once. The process may be repeated as many times as there are different characters in the type set. Simultaneously with the storage read-out operation, the type identifying means, which is a character code generator such as binary counters or the like, is generating a sequence of signals which identify those characters which are registering with the print hammer during the print subscans. The data signals read out of the various storage positions are compared with the character signals generated by the character generator for the corresponding print positions. When the comparison circuit detects an identity in signals from the character generator and the data storage, an equal compare signal is produced and used for sending a hammer operate signal through the hammer selection means to the addressed hammer. The timing for the scanning of storage and the stepping of the type identifying counters is provided by a pulse generator, driven in synchronism with the type chain, and a cyclically operable electronic clock. The pulse generator is designed to generate a timing pulse at the beginning of each print subscan. The timing pulse initiates clock operation whereupon a series of pulses is' generated by the clock each clock cycle to step the type tracking counters, advance the storage read-out and hammer selection means, and fire hammers in case of an equal compare signal. In the preferred form the clock is designed to repeatedly generate a sequence of pulses whereby address, compare, hammer firing functions occur in sequence along with various checking functions as described in the above Eden patent.

A principal characteristic of the chain printer apparatus described in the above patents is that the print cycle, i.e., the time during which printing occurs, is fixed even though the amount of data in successive print lines may vary. Thus the output rate of printing remains fixed regardless of variations in the amount of data in storage for various lines. In a copending application of F. Saltz, Serial No. 308,312, filed September 11, 1963, and assigned to the same assignee as the present invention, a variable print cycle printer apparatus is described and claimed. In general, the preferred embodiment shown in the Saltz application provides a variable print cycle control which includes a counter device which is set during data input to a level corresponding to the number of characters in a print line. As printing occurs, the counter registers the number of hammer operations until the set limit is reached, whereupon the print operation is terminated and the printer is conditioned for printing a subsequent line of data.

It is a general object of the present invention to provide an improved printer apparatus and particularly a chain printer apparatus having a variable print cycle.

It is a specific object of the present invention to realize an economy in the use of control elements for providing a variable cycle printer apparatus.

It is also an object of the invention to provide an improved arrangement whereby line-at-a-time printers having fixed cycles may readily be converted to variable print cycle operation with minimum additional circuitry and expense.

It is an additional object of this invention to provide variable cycle control which also permits use of checking means for reliable printer operation.

The above as well as other advantages and objects are achieved in accordance with the practice of the present invention by providing a print cycle control storage device associated with data storage means which is conditioned to store a bit each time a related read out from data storage results in a printer operation. Specifically, a magnetic core storage. plane is provided for line cycle control which is operated coincidentally with the multiplane core data storage device. Means is provided for recording bits in the cycle control core plane each time a memory compare equal condition or the like occurs, vis-a-vis the data from the data storage. For terminating printer operation, means is provided for repeatedly sensing the condition of the cycle control plane and when a line full condition occurs in the print cycle control plane, a line full signal is generated which operates to terminate the printer operation and initiates a new print cycle. In the preferred embodiment of the present invention, the print operation is terminated at the end of a complete print scan following the sensing of a line full condition of the cycle control plane thereby assuring that the print controls are in the proper condition for the next print cycle. The line full signal of the cycle control means is also useful for initiating operation of checking means to determine separately the presence of a line full condition of the cycle control plane. Thus by using a magnetic core plane, there has been provided a means which is readily made compatible with data storage devices which have found wide application in printer apparatus. In addition, many printer devices already exist having core planes which are readily adapted to the practice of this invention with a minimum of modification. Thus an improved print rate output can be readily achieved with economy as well as reliability of operation.

In applying the present invention to existing apparatus, it may be found that the increased print rate obtainable with variable cycle control, particularly as practiced in the present invention, may produce a printer operation repetition rate which exceeds the duty limits of some components.

It is a 'further object of this invention to provide a further improvement to the variable cycle which prevents excessive cycling of certain components of the printer apparatus.

In the preferred embodiment, this latter objective is achieved by providing a print cycle rate control means adapted to limit the number of print cycles to a predetermined minimum consistent with duty cycle of the most critical components. Specifically, a counter device or the like is provided which monitors the number of print scans performed by the printer control and print mechanism. A coincidence device such as a logical AND circuit or the like is used which requires a predetermined count level output from the scan counter as well as a line full signal before the print cycle can be terminated. Thus it will be seen that a safety means is provided which permits variable print cycle operation to be obtained without exceeding the duty cycle of the printer apparatus.

It is a further feature of this invention to utilize a print scan counter for indicating both a minimum print scan level for cycle rate control and a maximum print scan level for terminating the print cycle in the event a malfunction occurs which does not indicate or produce line full condition. Thus additional reliability in printer operation is provided.

The foregoing and other objects, features and advantag es of the invention willbe more readily apparent from the following more particular description of a preferred embodiment of the invention, as illustrated in the accompanying drawings.

In the drawings:

FIG. 1 is a logic block diagram ofthe printer control in combination with print mechanism shown in schematic form and illustrating a high speed printer apparatus which incorporates the improved variable print cycle control feature of the present invention.

FIG. 2 is a logic diagram of a portion of the printer control circuit of FIG. 1 showing details of various control and checking circuits connected with high speed printer apparatus.

FIG. 3 is a logic diagram of a portion of the printer control circuit of FIG. 1 showing additional details of the cycle control circuitry of the present invention.

FIG. 4 is a logic diagram showing additional circuitry for providing the variable cycle control in combination with cycle rate control feature of the present invention.

FIG. 5 is a logic diagram of a print scan counter device used for cycle rate control of the present invention.

FIG. 6 is a logic circuit element used in connection with circuitry of FIG. 4 for terminating printer operation.

FIG. 7 is a timing chart showing the clock cycle for the basic timing operations used in the printer apparatus of FIG. 1.

" that a continuous type loop is formed. Associated with the type chain 10 are a plurality of uniformly spaced print hammers 17 arranged in a linear array parallel with the front straight portion of the type chain 10. The longitudinal spacing of the print hammers 17 is such that one hammer is provided for each position at which print impressions are to be formed to make a line of print. The longitudinal spacing of the characters on the type chain 10 is preferably 1.5 times the spacing of the hammers 17 as more fully described in the patent by Demer et al. Thus characters are alignable with only a portion of the hammers, viz one-third, for any one position of the type chain. In practicing the present invention, it is further preferable that the characters are spaced an additional increment so that alignment of the type characters occurs in serial manner in a longitudinal direction. The additional increment is a space increment equal to the distance the chain moves longitudinally during the time the controls perform their control function associated with the printing of one character.

Located between the print hammers 17 and chain 10 is a record medium such as a continuous paper document 18 and an ink ribbon 19. The ink ribbon 19 is fed in any well known manner between a pair of spools 20. The paper 18 is fed transversely to the direction of motion of the type chain 10 by any well known means such as forms feed tractor (not shown) which are connected to a drive means 21 which may be of any known type such as shown in U.S. Patent 2,531,885 of A. W. Mills et al., issued November 28, 1950. During printing, the paper 18 is held stationary. Upon termination of a printing operation, the paper 18 is shifted one or more lines by the paper drive 21 to a new line position for the next print line. The print hammers 17, which may be of any known type, are preferably inertia-rebound hammers operated by individual actuators 22 such as solenoids or the like energized by a hammer driver circuit 42 (see FIG. 2).

For printing, the action of the described print mechanism is as follows: With the type chain 10 moving at constant linear speed the type characters serially scan the print hammers 17 in a series of alignment sequences. With the spacing ratio specified above, every other type character along the print line becomes aligned serially with every third print hammer. The action whereby only a portion of the hammers are scanned is referred to as a subscan. For a spacing ratio of 1.5, three subscans are required to complete one print scan where each hammer 17 will have one character aligned therewith. Further details of the subscan (otherwise called subcycle) process may be obtained from said Demer et al., patent.

During the course of printing a line of data, the print hammers 17 are selectively operated by the actuators 22 in timed relation with the arrival of characters desired to be printed. A printer control system for selectively operating the print hammers 17 comprises a multi-position data storage device such as a multi-plane magnetic core storage matrix 23 having as many positions of storage as there are print hammers 17. The information to be printed in the different print positions of a line of data by hammers 17 is stored in multiple bit form with each bit stored in a magnetic core arranged in a particular position of the various core planes of matrix 23. For example, matrix 23 would have seven core planes for each bit of a seven bit binary code and each plane comprises plural cores arranged in a row and column configuration. A specific core plane arrangement might comprise 140 cores arranged in 14 rows of ten cores each to accommodate a corresponding number of hammers.

The information to be printed is written into different positions of matrix 23 from a data input channel 24 which connects a data input device which may include a central processing unit to an input and regenerate circuit 25. The writing of information in the various storage locations of matrix 23 is performed in any well known manner and may include X and Y write drivers 26 and 27, respectively, which selectively energize write windings of different cores in matrix 23 that are addressed by a plurality of X and Y switches 28 and 29 operated under the control of B (units) ring 30 and A (tens) ring 31. The stepping of the address ring 30 is under control of an electronic clock 32 and oscillator 33 and the stepping of ring 31 is eifected through ring 30. The writing operation is completed when the X and Y write drivers are operated in response to a W1 clock signal in combination With a read-in signal. Inhibit latches 34, which are energized or set on read-in by clock pulse R0 and selectively reset in response to data input over channel 24, have output windings 35 connected to selectively control inhibit windings of the core in the multiple planes of matrix 23 in opposition to the write lines. As is well known in the art, those inhibit lines which are energized from lines 35 will oppose switching of write windings energized by the X and Y write drivers 26 and 27. Addressed cores having non-energized inhibit lines are switched from a first to a second state by the energizing of write windings through X and Y drivers 26 and 27. p

. Read-out of information from the various storage positions of matrix 23 for printing is also elfected in a manner well known in the art. The different core positions that are addressed by the X and Y switches 28 and 29 under the control of the A and B rings 31 and 30, are energized by X and Y read drivers 36, 37, respectively, in response to a clock signal R1 and a Print Scan signal. Outputs upon read-out from the sense windings of the cores are fed through sense amplifier 38 via a feedback connection 39 to regenerate circuit 25 to inhibit latches 34. The read-out from the regenerate circuit 25 is also fed to compare circuit 48 via connection 49. At clock time W1, the information in latches 34 is rewritten into the same position of storage by the X and Y write drivers 26 and 27 before the next position of storage is addressed.

With the 1.5 type-to-hammer spacing ratio, the addressing and read-out from the storage positions of matrix 23 preferably occurs in the same sequence that characters of the moving chain become aligned with print hammers 17. That is, during a subscan operation of the type chain 10, the matrix 23 is addressed and data readout from storage positions corresponding with the positions of hammers having type characters aligned therewith during the subscan. Likewise, positions of storage not addressed on a first subscan are addressed on successive subscans so that on completion of a print scan, each position of matrix 23 is read-out once.

During read-out, the hammers 17 are addressed in the same manner and sequence as matrix 23 is scanned. for that purpose address rings 30 and 31 are connected to a hammer select matrix 40 which preferably comprises a plurality of diode circuits 41 arranged in a row and column configuration corresponding to the arrangement of cores in a core plane of matrix 23. Plural hammer driver (HD) circuits 42 connected to the print hammer actuators 22 are connected to various diode circuits 41 of the hammer select matrix 40. Thus, when a particular location of storage of matrix 23 is addressed by rings 30 and 31, corresponding to a hammer position before which a type character is in alignment, the corresponding hammer drive circuit 42 for operating the print hammer actuator for that same hammer is addressed at the same time.

The control system for selective hammer operation further includes character generator means for identifying characters in the various positions of the type chain 10 during the course of the various subscans. One embodiment of a character identification means comprises a compare circuit 43 connected to a print subscan counter 44 which in turn is connected to the output pulse control means 45 having an input to a pulse generator including a transducer 46 and timing disk 47 connected to shaft 15 of drive wheel 13. The timing disk 47 is pref erably a magnetic drum having a plurality of slots in the periphery thereof. The transducer 46 senses the change in reluctance produced by the slots. The slots are spaced to generate a pulse at the beginning of each subscan, i.e., when the first character of a subscan group on type chain 10 is at the first subscan print position. An additional slot is provided between two regular subscan slots to generate a home pulse used for checking purposes. Specific details of the pulse control circuitry 45 may be obtained by referenceto the aforesaid Eden patent. Generally speaking, the pulse control circuitry comprises pulse amplifiers and shapers as well as a home pulse discriminator. The home pulse is generated at the time when a particular character for a particular hammer position is being identified by the counters 43 and 44. If at the home pulse time the counters are set in a character position different from the predetermined character, the pulse control 45 indicates an error condition for the counters and an error indication to printer control is generated.

Character identification is provided by the print subscan counter 44 to identify the first character in alignment with a print hammer 17 at the beginning of each subscan. The compare counter 43 is set by the subscan counter 44 to identify the first character each subscan and in response to a sequence of pulses from clock 32 generates code signals representing all the other characters of the subscan group in alignment with the remaining print hammers 17 during a subscan. Both the print subscan counter 44 and compare counter 43 are binary counters interconnected so that the character setting of the subscan counter 44 is transferred to the compare counter 43 on occurrence of a subscan pulse from transducer 46 through pulse control 45. Thereafter during the course of a subscan, a specific pulse in each clock cycle from clock 32 steps the compare counter 44 in timed relation with the address of data matrix 23 and hammer select matrix 40. For example, the R0 clock pulse in each clock cycle in combination with a PS signal advances the compare counter 43. The output of the compare counter 43 is fed to a comparison circuit 48 which has a when the data from a matrix 23 storage position is placed in latches 34 through feedback connection 39, the'same data is communicated on line 49 to compare circuit 48 and a comparison vmade with the character signal produced by compare counter 43. Comparison is made on W clock pulses in combination with a PS signal. In the case of an identity, a memory compare equal pulse gates a W1 clock pulse through AND circuit 61 to hammer select matrix 40. This activates the specific hammer drive circuit 42 (see FIG. 2) corresponding to the storage hammer position at which the memory compare equal occurred to energize the appropriate hammer actuator 22 of a print hammer 17. l

Associated with data storage matrix 23 are a plurality of additional core planes 50, 51, 52 and 53. The core planes have a row and column arrangement corresponding with the arrangement of core planes of matrix 23. Briefly, the additional core planes comprise print errror check plane 50, print cycle control plane 51, hammer fire check plane 52, and equal check plane 53. The cores of the planes 50-53, are addressed simultaneously with the corresponding positions of storage matrix 23. For that purpose the cores of planes 5053 are wound in a manner known in the art so that core addressing of matrix 23 by X and Y switches 28 and 29 produces concurrent addressing of corresponding cores in planes 50-53. The function of the core planes 50, 52 and 53 is to record various functions occurring in the control system and printer apparatus for checking purposes to assure reliability of operation. The function of plane 51 is to record each memory compare equal signal for use in determining when print operation is to be terminated. A first function which is recorded is the memory compare signal generated upon the occurrence of an identity as determined by compare circuit 48. The equal check plane 53 records a bit each time a memory compare equal signal occurs at circuit 48. As shown in FIG. 2, during each cycle of clock pulses, the read or R pulses occur before the corresponding write or W pulses. Accordingly, during a print cycle, each of the cores 70 in the equal check plane 53 is set to a 1 during the writing or W portion of the cycle, as in the read portion R0 of the clock cycle the latch 63 is reset, and the inhibit line 73 is ineffective to oppose the write lines. The occurrence of a memory compare equal signal during the print scan operation results in a setting of the compare equal latch 63 and energizing the inhibit line 73 to set the core 70 to 0 when the equal signal from compare circuit 48 indicates that the corresponding print head hammer driver I-ID should be fired.

A second function recorded is the firing of a hammer driver circuit 42. For this purpose, each of the cores in the hammer fire check plane 52 such as the core 60 is initially set to 0 by the X and Y read lines during the R portion of the print cycle. Whenever a particular hammer driver HD 42 is fired to operate its corresponding hammer, a signal is provided over conductor 64 to set the core 60 to a 1. Since the switch in core states occurs during the write portion of the clock cycle, this is after the cores have been read and compared. The conditions of the cores 70 and 60 for each print position are therefore compared in succession on the next print scan by a compare circuit 85 and since the cores should at all times be in opposite conditions, a compare signal results in an error, and this signal is applied over line 81 through OR circuit 82 to set a print error check latch 86 which results in setting the corresponding core 84 in the print check error plane 50.

In connection with the present invention, the print cycle control plane51 is used in combination with other control elements to be described as a means for terminating the print line cycle when all characters to be printed would have been printed. Further details of plane 51 are better understood by reference to FIG. 3 as well as FIG. 1. While only a single core 90 is shown in FIG. 3, it is understood that plural cores 90 are provided in a single plane matrix where a core is provided for each position of storage in matrix 23.

During the read-in operation, all cores 90 in the cycle control plane 51 are switched to a zero state in the read portion of the clock cycle. As printable characters are recorded in a storage position of matrix 23 during the write portion of the clock cycle, the corresponding addressed core 90 in plane 51 is switched to the 1 state. In position where a blank or unprintable character occurs, no switching of core 90 takes place. One arrangement whereby this can be accomplished is illustrated in FIG. 3 where print cycle control inhibit latch 91 is reset bya R0 clock pulse in combinationwith a read-in signal applied through AND circuit 92 to OR circuit 93 and to the reset input of the latch 91. The resetting of latch 91 prevents energization of the inhibit driver 96. Thus the energization of the X and Y write lines by write drivers 26 and 27 selected by X and Y switches 28 and 29 under control of the A and B address rings 31 and 30 for Writing data into matrix 23 coincidentally sets core 90 to a 1 state. If a blank or invalid character is to be entered into a storage position of matrix 23 a No-Print signal applied to line 98 sets the print cycle control inhibit latch 91 through OR circuit 99 and effects ener gization of the inhibit line 97 so as to prevent setting core 90 to a 1 state. Thus at the completion of read-in, every printable character stored in matrix 23 is represented by a switched core in a corresponding storage location in the print cycle control plane 51.

During the read-out portion of the print cycle, cores 90 previously switched to a 1 state on read-in will be reswitched to a 0 state for each memory compare signal from compare circuit 48 appearing on line 55 (FIG. 1). Referring again to FIG. 3, this is accomplished by a memory compare equal signal from compare circuit 48 to OR circuit 99 applied to the set input of latch 91. When all the previously switched cores 90 have been reswitched from 1 to the 0 state, plane 51 may be considered to be in Line Full condition indicating that all characters to be printed have been optioned for printing and the printing of a line of data should have been completed.

In accordance with the practice of the present invention, the print cycle control plane is repeatedly monitored and when a line full condition occurs, the print operation is terminated. As shown in FIG. 1, the means for monitoring the condition of print cycle control plane 51 comprises an End Print Line control circuit 100 having an input connection to output line 94 from print cycle control inhibit latch 91. When End of Print Line circuit 100 senses a line full condition, a line full signal is generated to Carriage Control circuit 102 having control out: put connections to paper driver 21 to central processing unit and to OR circuit 82 connected to inhibit latch 86 of Error Check plane 50.

Further details of the End Print Line control 100 may be seen by reference to FIG. 4. A preferred embodiment of an End Print Line control 100, as shown in FIG. 4, comprises a LineFull latch 120, and a Line Full Trigger 103 designed to generate a Line Full signal when all magnetic cores 90 in cycle control plane 51 have been switched to the same state during printing operation. In the preferred form, the monitoring of cycle control plane 51 is accomplished by having Line Full-Latch monitor the output line 94 of print cycle control inhibit latch 91. In a specific circuit arrangement, as shown in FIG. 4, the set input of Line Full Latch 120 is connected to the output of AND circuit 121 having a first input for receiving a Print Line Complete Inhibit signal from line 119 and Inverter 118 connected to line 94, a second input for receiving a W2 clock signal, and third input for a Print Scan signal indicative that the printer operation is in effect. The OFF output of Lane Full Latch 120 is connected to AND circuit 124 having an output to the Gate ON input GN of Line Full Trigger 103. The reset input of Line Full Latch 120 is connected through OR circuit 122 to output of AND circuit 123 having inputs for receiving Print Scan, subscan 3, and PS signals. The output of AND circuit 123 is also connected to the SET ON input of Line Full Trigger 103. The OFF side output of Line Full Trigger 103 is connected to an input of AND circuit 124 and its ON side output is connected through OR circuit 128 having an output 129 for delivering a line full signal. As previously described, upon the occurrence of a line full condition in print cycle control plane 51 a signal is generated by End Print Line Control 100 to Carriage Control 102 and to the central processing unit.

In the preferred form of this invention, the initiation of carriage control 102 and signal back to the central processing unit is accomplished with a Print Scans Complete signal generated at the ON side output of Print Scans Complete Trigger 132. As seen in FIG. 6, trigger 132 has its gate off input GF connected to the output of AND circuit 104 having inputs for receiving a line full signal from line 129 (FIG. 4). To assure that a print scans complete signal is not generated until all the storage positions of matrix 23 have been addressed, AND circuit 104 has an input for receiving a Last Address signal-from A and B address rings 31 and 30 and a third input for receiving a subscan 3 signal. The Set OFF side SF of Trigger 132 has an input for a W2 clock signal and the Set ON side SN has an input for a Print ready signal. The OFF output side of trigger 132 is connected to Gate ON side GN. In addition to being used for initiating operation of the carriage and central processing unit, the print scans signal is used for resetting Line Full Latch 120 and Line Full Trigger 103. For that purpose OR circuit 122 and the RESET OFF side RF of trigger 103 are connected to receive Print Scans Complete signals from trigger 132.

Insofar as. the End Print Line control 100 has been described, it is readily appreciated that without further circuit elements the print cycle could be terminated at the end of any print scan in which a line full condition occurs in plane 51. However, in accordance with another feature of this invention, End Print Line Control 102 is modified to provide a cycle rate control such that a predetermined minimum number of print scans must be obtained before print operations can be terminated. The preferred means for providing cycle rate control comprises print scan detection means which preferably includes the scan counter 110 shown in FIG. 5. Scan counter 110 may be any well known counter circuit but preferably is a multi-stage binary counter adapted to advance in binary fashion each time a count pulse is applied to an input terminal thereof as is Well known in the art. In the printer embodiment shown, in order to advance scan counter 110 once each print scan, a multistage Print subscan (PSS) ring 111 is used which converts three subscan pulses from the transducer 46 and pulse control 45 into a single print scan pulse. For that purpose PSS ring 111 is preferably a three staged closed ring having a single input to its first stage designed to advance the ring to successive stages in response to series of PS pulses from pulse control 45. An output from the last stage is connected to AND circuit 112 having an output connected to input of scan counter 110. When the third PS pulse is applied to PSS ring, its third stage is switched causing a subscan 3 signal to be applied to input of AND circuit 112. This signal along with a Print Scan Signal applied to AND circuit 112 gates the succeeding PS pulse to line 113 to advance counter 110. Scan Counter 110 is shown having output leads 114 from each of its various stages. Various ones or combinations of these leads 114 in combination with a selection device (not shown) may be used to establish one or more predetermined count levels for scan counter 110. Scan counter 110 is also provided with a connection whereby it can be reset by Print Scans Complete signal from trigger 132 of FIG. 6.

Referring again to FIG. 4, it will be seen that outputs from scan counter are connected directly to OR circuit as well as through AND circuit 126. The count level signal from OR circuit 125 is connected to a third input of AND circuit 124 to the Gate ON input GN of Line Full Trigger 103.

In addition to providing cycle rate control, scan counter 110 may be used to initiate an error checking function. For example, a complete line may have been printed, but due to error in one or more of the operations, a line full condition was not recorded or detected and. a print scans complete signal may not be produced from the circuit of FIGS. 4, 5, and 6. In anticipation of this occurrence, print scan counter 110 is designed to count 'a predetermined maximum number of print scans which is greater than the maximum possible number of print scans which could occur in printing any line of data. A maximum count output signal may be acquired by connecting plural stage outputs from scan counter 110 to AND circuit 132 to a second input of OR circuit 128. Thus when the scan counter 110 reaches its maximum count, a Line Full signal is generated on line 129. The Line Full signal in addition to initiating a Print Scans Complete signal from Trigger 132, also may be used for sampling the output from inhibit latch 91 of FIG. 3. For that purpose a line full signal is applied to AND circuit 134 which gates the output of latch 91 to an Error Stop Latch 135. If a print line complete check signal appears on line 142, a signal is applied through OR circuit 82 (as seen in FIG. 2) to set latch 86 of error check plane 50. An error signal produced may then be used in conventional manner to produce an error condition which is sensed for error print out or printer shutdown.

Operation To begin print operation, constant speed drive 16 is turned on to drive type chain 10 at a constant rate of travel in line with the row of print hammers 17. As the chain moves, magnetic disk 47 rotates to generate a PS timing pulse at the beginning of each subscan. The generation of a PS pulse corresponds with the arrival of the first of the plurality of characters on type elements 11 of chain 10 to be aligned in each subscan. With each PS pulse generated in transducer 46, PSS counter 44 is advanced to identify the above-mentioned first type character in the subscan character group. Thus PSS counter 44 keeps track of the type movement at all times when type chain 10 is in motion.

Upon signal from the printer that it is ready to print, a data processing unit will feed a line of data to be printed. The data is read character-by-character through data channel 24 and Data Input and Regenerate circuit 25 into the plural storage positions of data matrix 23 as previously described. As previously described on readin of data, the cores 90 of cycle control plane 51 switched from an initial 0 to a 1 state when a printable character is stored in the corresponding storage location of matrix 23. Where a data storage position of matrix 23 has an unprintable character or blank, the cores 90 for those positions remain in 0 state. While in the described embodiment cores are switched from 0 to l in plane 51 when a printable character is registered in a storage location, it is readily appreciated that a reverse convention could be used wherein the cores 90 are switched from 1 to zero state when an unprintable or blank character is registered. Such convention might be useful for example where a negative logic technique is utilized. In any case, when a complete line of data is stored in matrix 23, a print scan signal is generated which among other things conditions the clock 32 to be turned on by a subsequent PS pulse from transducer 46, When the predetermined PS pulse is generated clock 32 is turned on and gates a series of pulses from oscillator 33 in repetitive fashion to form the clock cycle sequence of pulses shown in FIG. 7.

Referring specifically to FIGS. 1, 3, and 7 the specific operation of print cycle control plane 51 will be more fully understood. At R time, an R0 clock pulse is gated through AND circuit 89 and OR circuit 99 to set cycle control plane inhibit latch 91. This turns latch 91 ON providing an input to AND circuit 95. At R1 time, the first subscan position of storage matrix 23 is addressed coincidentally with the first subscan hammer position in hammer select matrix 40. Simultaneously, an R1 clock pulse activates X and Y read drivers 36 and 37 to energize X and Y read windings of core 90. If core 90 is initially -in 0 state, no read-out signal is produced, latch 91 remains ON. At W1 time, a W1 clock pulse is applied to X and Y write drivers 26 and 27 to energize X and Y write windings of core 90. At the same time, a Wlclock pulse is gated through AND circuit 95 to activate core drive 96 to energize inhibit winding 97. Thus when the X and Y write windings are energized, core 90 remains unswitched in the 0 state indicating that there is no data in the corresponding storage position to be printed. At the end of a W2 clock pulse, core driver 96 turns off to de-enrgize inhibit winding 97 and the next subscan storage position of matrix 23 and core plane 51 is addressed and the process repeated until all the subscan group of cores are interrogated. If core 90 were in the 1 state, and R0 clock pulse sets latch 91 ON, providing an input to AND circuit 95. At R1 time, core 90 is switched from 1 to 0 state since inhibit winding remains de-energized. The switching of core 90 to 0 state generates a pulse in SA38 which resets cycle control inhibit latch 91 turning the latch OFF. Two possible operations can now occur. First, if the character on chain 10 at the addressed hammer position is the same as the character stored in the corresponding storage position of matrix 23, a memory compare signal from compare circuit 43 at W0 time is gated through OR' circuit 99 to again turn inhibit control latch 91 ON. Consequently, a W1 clock pulse turns on Core Driver 96 and inhibit winding 97 will be energized to inhibit reswitching of core 90 from 0 to 1 state. Second, if no memory compare equal signal is produced from compare circuit 43 when core 90 was initially in the 1 state, latch 91 would be turned OFF by a reset signal from SASS, but it would not be turned on again prior to W1 time. Thus, a W1 clock pulse will not be gated through AND circuit 95, core driver 96 is not activated, and inhibit winding 97 remains de-energized and X and Y write drivers 26 and 27 reswitch core 90 to the 1 state indicating that the character to be printed has not yet come up for printing at the addressed printing position.

At the end of W2 time, the clock 32 repeats its pulse cycle sequence of FIG. 7 to cause the A and B rings 31 and 30 to address the next subscan storage position of matrix 23, and corresponding core positions of planes 50-53, and the hammer position of matrix 40, and character counter is advanced to generate the binary code signal representing the character on chain 10 coming into position at the addressed hammer position. For each address position, the cycle control plane 51 is interrogated for the conditions previously mentioned and the cores are reswitched if a memory compare equal signal is generated in the addressed position and the inhibit control latch was reset OFF by a read-out pulse at R1 times At the end of the first subscan, only a portion of all of the storage and hammer locations have been interrogated. This results from the fact that due to the 1.5 spacing ratio of the type characters only of the hammers have had characters aligned therewith. Thus the subscan process is repeated for a second portion of the storage locations. The PS pulse produced by transducer 46 through pulse control 45 again initiates the clock 32 operation, advances the rings 30 and 31 to address the cores and sets the PSS and character counters 42 and 43 to the appropriate count position. A P S pulse generated by pulse control 46 is applied to PS8 ring 111 setting it in its second stage indicating that the first subscan has been completed. During the course of the second subscan, the inhibit control latch 91 is turned on by an R0 pulse and reset for every addressed position of plane 51 which has a core in the 1 state during readout. At the end of the second subscan, a I S pulse advances PSS ring from second to third stage indicating that the second subscan has been completed. A PS pulse from transducer 46 through pulse control initiates the third subscan process described above and the process of setting and resetting the latch 91 and switching addressed cores 90 in cycle control plane 51 is performed if proper conditions occur. When the last core position of matrix 23 is addressed in the third subscan, a last address signal is generated by A and B address rings 31 and 30 for application to AND gate 104 in FIG. 6. Since the PSS ring is in the third stage, a subscan 3 signal is produced at the output of the last stage and applied to the input of AND gate 112 which gates the next PS pulse generated by transducer 46 to advance scan counter to indicate that the first print scan has been completed. The subscan process is repeated until all cores 90 have been switched to 0 state to indicate a line full condition.

The line full condition is determined in the following manner:

Since inhibit control latch 91 is pulsed to be turned ON at the beginning of each cycle of clock 32, and is turned OFF in any clock cycle only if a 1 state is to be re-recorded in any core 90, the condition of the output of latch 91 at the end of each clock cycle serves as a means for determining whether anything remains to be printed. Thus if latch 91 is in OFF condition at the end of any clock cycle, all data has not been printed. Conversely, if the latch 91 is ON at the end of each clock cycle, a line full condition is concluded at the end of a Print Scan. The manner in which this is performed is understood by reference to FIGS. 3 and 4.

At the beginning of printing, Line Full latch of FIG. 4 is turned OFF and Line Full Trigger 103 is switched so that the OFF side is up and ON side is down. At the beginning of each clock cycle as previously described inhibit control latch 91 is set ON. If the addressed core 90 is in 0 state, latch 91 stays ON and Print Line Complete Inhibit input from line 119 in FIG. 3 is down and a W2 sample pulse is not gated through AND circuit 121 and Latch 120 remains OFF. If any core 90 is in 1 state on read-out, latch 91 is reset OFF bya reset pulse from SA38. Now if no memory compare equal signal is generated. from that core position, latch 91 will remain OFF causing a W2 sample pulse to be gated through AND circuit 121 to the set input of latch 120 turning it ON. Turning line full latch 120 ON drops it OFF output to AND circuit 124 causing the GN to go down. If in any clock cycle line full latch 120 is turned ON, it signifies that a data position in storage has not yet achieved a print option and therefore printing has not yet been completed. Also when line full latch 120 is switched ON, it remains ON for the remainder of the print scan. This prevents the Line Full Trigger 103 from being activated to produce a Line Full Signal. If during the course of a complete print scan all cores 90 of cycle control plane 51 not in 0 state are switched from 1 to 0 state by memory compare equal signals, the Line Full Latch 120 will remain OFF since the W2 sample pulses will not be gated by AND circuit 121 since at the arrival of each W2 sample pulse Print Line Complete Inhibit input from line 119 will be down. Thus at the end of the print scan in which latch 120 is OFF, a pulse generated from AND circuit 123 to the SN input of Line Full Trigger 103 will switch it so that the ON side output goes up. This causes Print Scan Complete Trigger 132 to be switched OFF when last address and subscan 3 occurs, generating a Print Scans Complete signal to terminate the print cycle and reset Line Full Latch 120 and Line Full Trigger 103 for the next print cycle.

In cycle rate limitation, the line full condition monitoring of inhibit control latch 91 with line Full latch 120 and line full trigger 103 is performed in the same way except that the selected stage leads 114 of counter 110 are connected through OR circuit 125 to a third input of AND circuit 124. Thus, if at the end of any print scan when a subscan 3 pulse occurs, if Line Full latch 120 remains OFF and if the scan counter 110 has not reached the predetermined count level selected as the minimum number of print scans, Line Full Trigger 103 will not be activated and the ON output thereof stays down. Likewise, if counter 110 does reach the predetermined count level prior to the occurrence of a line full condition, the cycle termination may not occur immediately since Line Full latch 120 may have been turned ON with the result that no line full signal is gated through AND circuit 124 to GN input of Line Full Trigger 103. However, when the count level has been reached and latch 120 remains OFF, a subscan 3 signal plus a PS signal from AND circuit 123 results in triggers 103 and 132 being successively activated as previously described to terminate the print cycle.

While the invention has been particularly shown and described with reference to a preferred embodiment thereof, it will be understood by those skilled in the art that the foregoing and other changes in form and details may be made therein without departing from the spirit and scope of the invention.

What is claimed is:

1. In a printer apparatus, the combination comprising (a) a print mechanism having an impression device at plural print positions of a print line for forming impressions from character type on a constantly moving type means,

(b) means for cyclically operating said print mechanism, including (c) first means for generating character signals to determine characters in position to be printed,

(d) second means including a data storage means for presenting signals of characters in a line of data to be printed at various print positions,

(e) third means for generating an equal compare signal each time an identity occurs between signals from said first and second means,

(f) and means for regulating the cycle of said print mechanism as a function of the number of characters to be recorded in a line of data including (g) a cycle control storage device comprising plural bistable storage elements adapted to be switched from a first to a second state for indicating positions at which characters are to be printed,

(h) means for controlling the switching of said bistable storage elements,

(i) said control means being responsive to equal compare signals generated by said third means for switching bistable storage elements to said first state,

(j) means operable during the operating cycle of said print mechanism for periodically interrogating said cycle control storage print cycle to determine when all bistable elements thereof have been restored to ,the same state,

(k) and means for terminating the print cycle of said print mechanism including means responsive to a line full signal from said interrogating means indicating that ,all bistable elements are in said first state.

2. In a printer apparatus, the combination in accordance with claim 1 in which said second means for presenting signals of characters in a line of data to be printed comprises (a) means for cyclically scanning the storage positions of said data storage device in synchronism with the movement of said type means,

(b) all of said storage positions being scanned once each print scan,

(c) and means for regulating the cycle rate of said print mechanism including means for delaying the termination of said print cycle by said cycle termination means for a predetermined minimum number of print scans.

3. In a printer apparatus, the combination in accordance with claim 2 in which said means for preventing the termination of said print cycle comprises (a) a print scan counter,

(b) and said means for terminating the print cycle of said print mechanism comprises means responsive to a minimum count from said counter and said line full signal from said interrogating means.

4. In a printer apparatus, the combination in accordance with claim 3 in which (a) said print scan counter is operable for indicating a minimum and maximum print scan count,

(b) and said cycle termination means includes means operative in response to a maximum count to terminate said print cycle in the event a signal is not provided from said interrogating means.

5. In a printer apparatus, the combination in accordance with claim 1 in which said storage element switching control means comprises (a) means for scanning and selectively controlling the reading from and writing in said storage elements including a bistable control element switchable to first and second states for controlling the switching of said storage elements during writing therein,

(b) and said means for periodically interrogating said cycle control storage device comprises means for sensing the state of said bistable control element during the writing operation of said control means for determining the switched condition of each of said storage elements.

6. In a printer apparatus, the combination in accordance with claim 5 in which said bistable control element comprises (a) a latch having an output connected for controlling the switching of said storage element during writing operation of said control means,

(b) and said interrogating means comprises means for sampling the condition of the output of said latch during writing operation for each storage element,

(0) means for generating a line full signal,

(d) means for activating said line full signal generator at the completion of scanning of all of said storage elements,

(e) and said sensing means includes means for detecting a change in condition of the output of said latch during said samplings for inhibiting the activation of said line full signal generator.

7. In a printer apparatus, the combination in accordance with claim 6 in which said detection means comprises (a) a bistable element switchable from a first to a second state in response to a change in condition of said control latch.

8. In a printer apparatus, the combination in accordance with claim 7 in which (a) said means for activating said line full signal generator comprises means for generating a timing pulse each subscan of said scanning means,

(b) means for gating one of said timing pulses at the end of each complete print scan of said storage elements,

(c) and means operable in response to a. second state condition of said detection means for blocking said gated timing pulse to said line full signal generator.

9. In a printer apparatus, the combination in accordance with claim 8 which further comprises (a) means responsive to a gated timing pulse from said timing pulse generator for resetting said bistable detection element to said first state upon the end of each complete scan of said storage elements.

, (b) a plurality of print hammers associated with said type member for obtaining print impressions of selected ones of said type characters,

(c) means for effecting a relative motion of said type member and said print hammers,

(d) means for cyclically operating said printer device 4 including (e) first storage means for storing a plurality of signals indicating characters to be printed on a record medium, a

(f) means for generating a plurality of signals in timed relation with the advance of said type characters past said print hammers, said plurality of signals identifying type characters in position to be struck by said print hammers,

(g) means for comparing signals derived from the various positions of said first storage means with signals from said type character signal means, said comparing means including means for indicating an equal compare between said storage and said type character signals,

(h) and means for terminating the cycle of said print device as a function of the number of characters in said first storage means including second storage means associated with said first storage means for storing signals in response to equal compare signal produced by said comparing means,

, (i) means for periodically interrogating said second storage means to determine when the stored signals therein equal the character signals in said first storage means, and

(j) means responsive to an equality signal from said interrogating means for initiating a termination of said print cycle.

11. A printer apparatus comprising in combination (a) a cyclically-operating print mechanism including (b) a type member having a plurality of type characters thereon,

(c) a plurality of print hammers associated with said type member for obtaining print impressions of selected ones of said type characters,

((1) means for effecting a relative motion of said type member and said print hammers, and

(e) means for indexing a record medium between said type member and said print hammers,

(f) means for selectively operating said print hammers comprising,

(g) first storage means for storing a plurality of signals indicating characters to be printed on said record medium, said storage means having a position of storage for each print hammer,

(h) means for generating a plurality of signals identifying type characters in position to be struck by said print hammers,

(i) means for comparing signals derived from the various positions of said first storage means with signals from said character signal means, said comparing means including means for indicating an equal compare between said storage and said type character signals,

-(j)' second storage means associated with said first storage means for storing signals in response to an equal compare indication from said comparing means, said second storage means having a storage position for each storage position of said first storage means,

(k) means for interrogating said second storage means to determine when the stored signals therein equal the character signals in said first storage means, and

(1) means responsive to a signal from said interrogating means for terminating said cycle of said printer and for initiating the indexing of said record medium to a new line'position.

12. Apparatus for recording blocks of information of variable character length comprising (a) a cyclical printer device,

(b) means for controlling the operation of said printer device including a first means adapted for storing blocks of information of variable character length,

(0) means for transferring characters in a block of information from said first storage means to said printer device,

(d) and means for controlling the cycle of operation of said printer as a function of the character length of a block of information in said storage means including a second storage means associated with said first storage means and responsive to said transfer means for recording transfer signals when characters are transferred from said first storage device to said printer device,

(e) and means for terminating the cycle of said printer device including means for periodically interrogating said second storage means to determine when said block of information has been transferred to said printer device,

(f) and means responsive to a line full signal from said last means for enabling said first storage means to receive a second block of information.

13. Apparatus in accordance with claim 12 in which said storage means comprises (a) a first magnetic core storage device having plural storage positions, and said cycle control means comprises (b) a second magnetic core storage device having storage positions corresponding with said storage positions of said first storage device,

(0) means responsive to said transfer means for recording a transfer signal in said second storage device in response to the transfer of characters from said first storage means to said printer device,

(d) and said means for enabling said storage means to receive a second block of information includes means for sensing when said second storage means has transfer signals stored therein indicative that all characters in said first storage device have been transferred.

References Cited by the Examiner UNITED STATES PATENTS 2,918,865 12/1959 Wooding 10l93 2,990,767 7/1961 Demer et a1. 10l93 2,993,437 7/1961 Demer et a1 10l93 3,064,561 11/1962 Maudllit 10l-93 3,066,601 12/1962 Eden 10l93 3,199,446 8/1965 Schaaf 10l93 WILLIAM B. PENN, Primary Examiner. 

1. IN A PRINTER APPARATUS, THE COMBINATION COMPRISING (A) A PRINT MECHANISM HAVING AN IMPRESSION DEVICE AT PLURAL PRINT POSITIONS OF A PRINT LINE FOR FORMING IMPRESSIONS FROM CHARACTER TYPE ON A CONSTANTLY MOVING TYPE MEANS, (B) MEANS FOR CYCLICALLY OPERATING SAID PRINT MECHANISM, INCLUDING (C) FIRST MEANS FOR GENERATING CHARACTER SIGNALS TO DETERMINE CHARACTERS IN POSITION TO BE PRINTED, (D) SECOND MEANS INCLUDING A DATA STORAGE MEANS FOR PRESENTING SIGNALS OF CHARACTERS IN A LINE OF DATA TO BE PRINTED AT VARIOUS PRINT POSITIONS, (E) THIRD MEANS FOR GENERATING AN EQUAL COMPARE SIGNAL EACH TIME AN IDENTITY OCCURS BETWEEN SIGNALS FROM SAID FIRST AND SECOND MEANS, (F) AND MEANS FOR REGULATING THE CYCLE OF SAID PRINT MECHANISM AS A FUNCTION OF THE NUMBER OF CHARACTERS TO BE RECORDED IN A LINE OF DATA INCLUDING (G) A CYCLE CONTROL STORAGE DEVICE COMPRISING PLURAL BISTABLE STORAGE ELEMENTS ADAPTED TO BE SWITCHED FROM A FIRST TO A SECOND STATE FOR INDICATING POSITIONS AT WHICH CHARACTERS ARE TO BE PRINTED, (H) MEANS FOR CONTROLLING THE SWITCHING OF SAID BISTABLE STORAGE ELEMENTS, (I) SAID CONTROL MEANS BEING RESPONSIVE TO EQUAL COMPARE SIGNALS GENERATED BY SAID THIRD MEANS FOR SWITCHING BISTABLE STORAGE ELEMENTS TO SAID FIRST STATE, (J) MEANS OPERABLE DURING THE OPERATING CYCLE OF SAID PRINT MECHANISM FOR PERIODICALLY INTERROGATING SAID CYCLE CONTROL STORAGE PRINT CYCLE TO DETERMINE WHEN ALL BISTABLE ELEMENTS THEREOF HAVE BEEN RESTORED TO THE SAME STATE, (K) AND MEANS FOR TERMINATING THE PRINT CYCLE OF SAID PRINT MECHANISM INCLUDING MEANS RESPONSIVE TO A LINE FULL SIGNAL FROM SAID INTERROGATING MEANS INDICATING THAT ALL BISTABLE ELEMENTS ARE IN SAID FIRST STATE. 